Robos has managed to dump the TV registers under Win98. You have to connect the TV before the drivers will allow you to select TV modes. I am attaching the dumps (with a few annotations by me) of both the TFT (LCD) display together with the monitor display in various combinations, and the same for the TFT and TV. The TV sits on DVOC. You can attach the pipes quite liberally to both the dvo's and the display planes, but it looks like you have to use both planes if you use both pipes. Please watch the DPLL registers. They seem to be associated to the pipes, and convert the incoming to the outgoing clock. Don't programming the wrong values, because a clock frequency that is too high is a sure way to fry the encoder chip (this has actually happened). I have written a short summary of the i830 registers as far as I can guess them as comments into tv_i810 in the CVS. Please have a look. This info should be enough to get the TV mode working - Dirk Remark from Dirk passed on from me: be careful! If you write "too high" or wrong values into the registers the tv encoder might fry or the whole i830 graphics stuff might break! dump1 = with normal Laptop-TFT dump2 = with Monitor dump3 = with both TFT and Monitor mirrored dump4 = xinerama #1 NVTV 0.4.5 Probe (normalem Laptop-TFT) = LFP2 i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000... to 0xd265c000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=D0820000 B=D0820000 A: mn=26 P p=2 B: mn=26 P p=2 ADPA=00008C00 DVO A=C000401C B=00000080 C=00000080 (Mon:A, DVO:B) dis en, B LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00041608 00021207 00041608 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8024008E Pipe A HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=027F018F CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Pipe B (plane A -> DVOA tft) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D5000000 BASE=00000000 STRIDE=00000800 (pipe B) en, gamma, 16BPP, B Display plane B CTRL=01000000 BASE=00000000 STRIDE=00000000 (pipe B) I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: C4 27 7E 05 84 5A 20 6E 03 E1 04 09 00 00 00 00 10: 00 82 00 00 00 00 25 38 0B 06 05 0D 08 C8 F2 81 20: 00 00 00 00 00 AE AE D7 FF 47 06 15 81 08 06 06 30: 00 80 A0 E4 16 30 00 00 56 00 FA FA 3F 3F FA FA 40: 0F 0F 03 FC 00 00 00 00 18 1E 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 #2 NVTV 0.4.5 Probe (Monitor) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000... to 0xd265c000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=90820000 B=D0820000 A: mn=18 P p=2 B: mn=26 P p=2 ADPA=80000000 DVO A=4000409C B=00000080 C=00000080 (Mon:A, DVO:B) en, A dis, B LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00041608 00021207 00041608 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8024008E Pipe A ( -> Mon) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Pipe B HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D4000000 BASE=00000000 STRIDE=15CF0800 (pipe A) Display plane B CTRL=01000000 BASE=00000000 STRIDE=00000000 (pipe B) I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: C4 27 7E 05 84 5A 20 6E 03 E1 04 09 00 00 00 00 10: 00 82 00 00 00 00 25 38 0B 06 05 0D 08 C8 F2 81 20: 00 00 00 00 00 AE AE D7 FF 47 06 15 81 08 06 06 30: 00 80 A0 E4 16 30 00 00 56 00 FA FA 3F 3F FA FA 40: 0F 0F 03 FC 00 00 00 00 18 1E 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 #3 NVTV 0.4.5 Probe (TFT and Monitor mirrored) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000... to 0xd265c000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=90820000 B=D0820000 A: mn=26 P p=2 B: mn=26 P p=2 ADPA=80000000 DVO A=C000401C B=00000080 C=00000080 (Mon:A, DVO:B) en, A en, B LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00041608 00021207 00041608 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8024008E Pipe A (plane A -> Mon) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000005 Pipe B (plane B -> DVOA tft) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D4000000 BASE=00000000 STRIDE=15CF0800 (pipe A) en, gamma, 16BPP, A Display plane B CTRL=95000000 BASE=00000000 STRIDE=00010800 (pipe B) en, 16BPP, B I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: C4 27 7E 05 84 5A 20 6E 03 E1 04 09 00 00 00 00 10: 00 82 00 00 00 00 25 38 0B 06 05 0D 08 C8 F2 81 20: 00 00 00 00 00 AE AE D7 FF 47 06 15 81 08 06 06 30: 00 80 A0 E4 16 30 00 00 56 00 FA FA 3F 3F FA FA 40: 0F 0F 03 FC 00 00 00 00 18 1E 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 #4 NVTV 0.4.5 Probe (xinerama) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000... to 0xd265c000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=90820000 B=D0820000 A: mn=26 P p=2 B: mn=26 P p=2 ADPA=80000000 DVO A=D000401C B=00000080 C=00000080 (Mon:A, DVO:B) en, A en, B, ? LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00041608 00021207 00041608 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8024008E Pipe A (plane A -> Mon) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Pipe B (plane B -> DVOA tft) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=031F0257 CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D4000000 BASE=00000000 STRIDE=15CF0800 (pipe A) en, gamma, 16BPP, A Display plane B CTRL=C9000000 BASE=07000000 STRIDE=15CF0320 (pipe B) en, gamma, 8BPP, B I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: C4 27 7E 05 84 5A 20 6E 03 E1 04 09 00 00 00 00 10: 00 82 00 00 00 00 25 38 0B 06 05 0D 08 C8 F2 81 20: 00 00 00 00 00 AE AE D7 FF 47 06 15 81 08 06 06 30: 00 80 A0 E4 16 30 00 00 56 00 FA FA 3F 3F FA FA 40: 0F 0F 03 FC 00 00 00 00 18 1E 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NVTV 0.4.5 Probe (tv-tft) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000...to 0xd26e5000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=D0820000 B=D0844000 A: mn=26 P p=2 B: mn=26 P p=4 x=2 -- A tft, B tv ADPA=00008C00 DVO A=8000409C B=00000000 C=C00000C4 dis, A en, A dis en, B LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00041608 00021207 00021004 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8124008E Pipe A (plane A -> DVOA tft) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000005 Pipe B (plane B -> DVOC tv) HTOTAL=057703FF HBLANK=057703FF HSYNC=04FB04BB VTOTAL=03E702FF VBLANK=03E702FF VSYNC=03750373 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D4000000 BASE=00000000 STRIDE=00000800 en gamma 16BPP A Display plane B CTRL=D5000000 BASE=00000000 STRIDE=00000800 en gamma 16BPP B I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: E5 27 7B 4F BE 3C 30 6D 04 E1 07 2A 20 6D C2 D7 10: 00 81 B7 0C 00 00 25 46 6C 03 33 38 08 C8 F2 81 20: 0C 02 00 00 01 ED ED 16 00 47 08 22 9B 64 21 22 30: 00 80 A0 E4 16 30 00 00 60 0C 8A 60 39 3E BA E4 40: FE 7E 3F E0 15 40 00 00 18 32 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NVTV 0.4.5 Probe (tv-tft_xinerama) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000...to 0xd26e5000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=D0844000 B=D0820000 A: mn=26 P p=4 x=2 B: mn=26 P p=2 -- A tv, B tft ADPA=00008C00 DVO A=C000409C B=00000000 C=800000C4 dis en, B dis en, A LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00021004 00021207 00041608 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8124008E Pipe A (plane A -> DVOC tv) HTOTAL=057703FF HBLANK=057703FF HSYNC=04FB04BB VTOTAL=03E702FF VBLANK=03E702FF VSYNC=03750373 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=10000005 Pipe B (plane B -> DVOA tft) HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D5000000 BASE=00000000 STRIDE=00000800 en gamma 16BPP B Display plane B CTRL=D4000000 BASE=07000000 STRIDE=00000800 en gamma 16BPP A I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: E5 27 7B 4F BE 3C 30 6D 04 E1 07 2A 20 6D C2 D7 10: 00 81 B7 0C 00 00 25 46 6C 03 33 38 08 C8 F2 81 20: 0C 02 00 00 01 ED ED 16 00 47 08 22 9B 64 21 22 30: 00 80 A0 E4 16 30 00 00 60 0C 8A 60 39 3E BA E4 40: FE 7E 3F E0 15 40 00 00 18 32 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NVTV 0.4.5 Probe (tv) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000...to 0xd26e5000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=D0820000 B=D0844000 A: mn=26 P p=2 B: mn=26 P p=4 x=2 -- A tft, B tv ADPA=00008C00 DVO A=4000409C B=00000000 C=C00000C4 dis dis, B dis en, B LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00041608 00021207 00021004 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8124008E Pipe A HTOTAL=053F03FF HBLANK=053F03FF HSYNC=049F0417 VTOTAL=032502FF VBLANK=032502FF VSYNC=03080302 SOURCE=027F018F CONFIG=80000000 7z0030=00017E5F 7z0080=10000005 Pipe B (plane A -> DVOC tv) HTOTAL=057703FF HBLANK=057703FF HSYNC=04FB04BB VTOTAL=03E702FF VBLANK=03E702FF VSYNC=03750373 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D5000000 BASE=00000000 STRIDE=00000800 en gamma 16BPP B Display plane B CTRL=01000000 BASE=00000000 STRIDE=00000000 dis I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: E5 27 7B 4F BE 3C 30 6D 04 E1 07 2A 20 6D C2 D7 10: 00 81 B7 0C 00 00 25 46 6C 03 33 38 08 C8 F2 81 20: 0C 02 00 00 01 ED ED 16 00 47 08 22 9B 64 21 22 30: 00 80 A0 E4 16 30 00 00 60 0C 8A 60 39 3E BA E4 40: FE 7E 3F E0 15 40 00 00 18 32 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NVTV 0.4.5 Probe (tv1) i830 (00:02.00) (3577) io=0x90100000 mapping 90100000 size 00080000...to 0xd26e5000 DCLK 0D=00021207 1D=00031406 0DS=0000888B DPLL A=D0844000 B=D0844000 B: mn=26 P p=4 x=2 B: mn=26 P p=4 x=2 ADPA=00008C00 DVO A=4000409C B=00000000 C=C00000C4 dis dis, B dis en, B LVDS=00000000 DIM A=00000000 B=00000000 C=00000000 FPA 00021004 00021207 00021004 00021207 020cc=0000004C 020d8=01080108 020dc=00000108 71280=00000000 71400=8124008E Pipe A HTOTAL=057703FF HBLANK=057703FF HSYNC=04FB04BB VTOTAL=03E702FF VBLANK=03E702FF VSYNC=03750373 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=10000005 Pipe B (plane A -> DVOC tv) HTOTAL=057703FF HBLANK=057703FF HSYNC=04FB04BB VTOTAL=03E702FF VBLANK=03E702FF VSYNC=03750373 SOURCE=03FF02FF CONFIG=80000000 7z0030=00017E5F 7z0080=00000000 Display plane A CTRL=D5000000 BASE=00000000 STRIDE=00000800 en gamma 16BPP B Display plane B CTRL=54000000 BASE=07000000 STRIDE=00000800 dis gamma 16BPP A I2C Devices: 1:EA 0:04 Device 1:EA = Chrontel-2 (id = 84) (1:EA) 00: E5 27 7B 4F BE 3C 30 6D 04 E1 07 2A 20 6D C2 D7 10: 00 81 B7 0C 00 00 25 46 6C 03 33 38 08 C8 F2 81 20: 0C 02 00 00 01 ED ED 16 00 47 08 22 9B 64 21 22 30: 00 80 A0 E4 16 30 00 00 60 0C 8A 60 39 3E BA E4 40: FE 7E 3F E0 15 40 00 00 18 32 84 17 00 20 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00